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author | Jason Gunthorpe <jgg@nvidia.com> | 2024-02-26 20:07:22 +0300 |
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committer | Will Deacon <will@kernel.org> | 2024-02-29 18:12:22 +0300 |
commit | ae91f6552c301e5e8569667e9d5440d5f75a90c4 (patch) | |
tree | 167978e83d76eb950201eb170362475e3ab0c1a4 /tools/perf/scripts/python/stackcollapse.py | |
parent | 1b50017d39f650d78a0066734d6fe05920a8c9e8 (diff) | |
download | linux-ae91f6552c301e5e8569667e9d5440d5f75a90c4.tar.xz |
iommu/arm-smmu-v3: Check that the RID domain is S1 in SVA
The SVA code only works if the RID domain is a S1 domain and has already
installed the cdtable.
Originally the check for this was in arm_smmu_sva_bind() but when the op
was removed the test didn't get copied over to the new
arm_smmu_sva_set_dev_pasid().
Without the test wrong usage usually will hit a WARN_ON() in
arm_smmu_write_ctx_desc() due to a missing ctx table.
However, the next patches wil change things so that an IDENTITY domain is
not a struct arm_smmu_domain and this will get into memory corruption if
the struct is wrongly casted.
Fail in arm_smmu_sva_set_dev_pasid() if the STE does not have a S1, which
is a proxy for the STE having a pointer to the CD table. Write it in a way
that will be compatible with the next patches.
Fixes: 386fa64fd52b ("arm-smmu-v3/sva: Add SVA domain support")
Reported-by: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Closes: https://lore.kernel.org/linux-iommu/2a828e481416405fb3a4cceb9e075a59@huawei.com/
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/11-v6-96275f25c39d+2d4-smmuv3_newapi_p1_jgg@nvidia.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions