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author | Matt Coster <matt.coster@imgtec.com> | 2025-04-10 12:55:01 +0300 |
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committer | Matt Coster <matt.coster@imgtec.com> | 2025-04-15 14:21:49 +0300 |
commit | 86e3f3a694903bc77f6e80ed0de2c9384c5bb9be (patch) | |
tree | f100e12f7e0de42ebc57899335a945217574c6d3 /tools/perf/scripts/python/stackcollapse.py | |
parent | 2c01d90998598b5f48b4ccdfdd3e7d407d094613 (diff) | |
download | linux-86e3f3a694903bc77f6e80ed0de2c9384c5bb9be.tar.xz |
dt-bindings: gpu: img: Add BXS-4-64 devicetree bindings
Unlike AXE-1-16M, BXS-4-64 uses two power domains.
Like the existing AXE-1-16M integration, BXS-4-64 uses the single clock
integration in the TI k3-j721s2.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-2-eda620c5865f@imgtec.com
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
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