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authorBharat Bhushan <bbhushan2@marvell.com>2022-02-11 07:53:46 +0300
committerWill Deacon <will@kernel.org>2022-03-08 14:17:37 +0300
commit68fa55f0e05ce371c4b5de7932d9f570d61bf791 (patch)
treecdf7e83d7971aef4a0023ee8dc2b09c5552d676b /tools/perf/scripts/python/stackcollapse.py
parent35a43326a9e3c229254fd531dfc711d20897d0fc (diff)
downloadlinux-68fa55f0e05ce371c4b5de7932d9f570d61bf791.tar.xz
perf/marvell: cn10k DDR perf event core ownership
As DDR perf event counters are not per core, so they should be accessed only by one core at a time. Select new core when previously owning core is going offline. Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com> Reviewed-by: Bhaskara Budiredla <bbudiredla@marvell.com> Link: https://lore.kernel.org/r/20220211045346.17894-5-bbhushan2@marvell.com Signed-off-by: Will Deacon <will@kernel.org>
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