diff options
| author | Tommy Haung <tommy_huang@aspeedtech.com> | 2022-03-02 05:49:28 +0300 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2022-03-03 01:38:35 +0300 |
| commit | 5e2421ce79703b969eeb9684cedaa76be5305ddd (patch) | |
| tree | 8a26571d33ed4691b7b89a5d76b0d0e1973595b9 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 9ae2ac4d31a85ce59cc560d514a31b95f4ace154 (diff) | |
| download | linux-5e2421ce79703b969eeb9684cedaa76be5305ddd.tar.xz | |
drm/aspeed: Update INTR_STS handling
Add interrupt clear register define for further chip support.
Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://patchwork.freedesktop.org/patch/msgid/20220302024930.18758-4-tommy_huang@aspeedtech.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions