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| author | Laurent Pinchart <laurent.pinchart@ideasonboard.com> | 2020-03-09 19:17:09 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-03-16 03:56:59 +0300 |
| commit | 4ae9afbaaeb9bd939ac2bb8d53828fdebca5ec1b (patch) | |
| tree | 4475197f8836703502be11c2d8a60bd4772801e4 /tools/perf/scripts/python/stackcollapse.py | |
| parent | b4fc6f72ddc1d4a53d3367b2d473e39d5d07a083 (diff) | |
| download | linux-4ae9afbaaeb9bd939ac2bb8d53828fdebca5ec1b.tar.xz | |
clk: imx7d: Add PXP clock
The PXP has a single CCGR clock gate, gating both the IPG_CLK_ROOT and
the MAIN_AXI_CLK_ROOT. Add a single clock to cover both.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions