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| author | Jon Lin <jon.lin@rock-chips.com> | 2021-06-21 13:47:57 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2021-06-23 14:35:41 +0300 |
| commit | 4a47fcdb5f8b220a396e896a4efed51c13e27d8b (patch) | |
| tree | 1ff7c9f09dfa4ab09d9f4e165104328b44e327cb /tools/perf/scripts/python/stackcollapse.py | |
| parent | 0f4f58b847b23d79185ad20ecf629c9f913f4f41 (diff) | |
| download | linux-4a47fcdb5f8b220a396e896a4efed51c13e27d8b.tar.xz | |
spi: rockchip: Set rx_fifo interrupt waterline base on transfer item
The error here is to calculate the width as 8 bits. In fact, 16 bits
should be considered.
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104800.19088-4-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions