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| author | Srinath Mannam <srinath.mannam@broadcom.com> | 2018-04-18 11:41:29 +0300 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2018-04-18 21:31:16 +0300 |
| commit | 4555a5021fe88fc4f19ff53d1e58b410cf30a49a (patch) | |
| tree | 41d369e8aecbde6e954e16fbd7ecd9a736aa347f /tools/perf/scripts/python/stackcollapse.py | |
| parent | 60cc43fc888428bb2f18f08997432d426a243338 (diff) | |
| download | linux-4555a5021fe88fc4f19ff53d1e58b410cf30a49a.tar.xz | |
arm64: dts: correct SATA addresses for Stingray
Correct all SATA ahci and phy controller register
addresses and interrupt lines to proper values.
Fixes: 344a2e514182 ("arm64: dts: Add SATA DT nodes for Stingray SoC")
Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Andrew Gospodarek <andrew.gospodarek@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions