diff options
| author | Michal Simek <michal.simek@amd.com> | 2025-02-06 14:57:07 +0300 |
|---|---|---|
| committer | Andi Shyti <andi.shyti@kernel.org> | 2025-03-18 23:53:54 +0300 |
| commit | 3d36dd1161ca3158f600d6dbeab8b645e56d1d92 (patch) | |
| tree | 77c26d1e4659711de9088a9db6aff5fad01fba46 /tools/perf/scripts/python/stackcollapse.py | |
| parent | ff885b6fd5dc1f90a5ee8d23b114a6c777437d56 (diff) | |
| download | linux-3d36dd1161ca3158f600d6dbeab8b645e56d1d92.tar.xz | |
i2c: cadence: Simplify using devm_clk_get_enabled()
Clock handling can be very simplified with using devm_clk_get_enabled() as
was done by commit 8d2aaf4382b7 ("gpio: zynq: Simplify using
devm_clk_get_enabled()").
And also fix issue in connection to incorrect sequence when err_clk_dis
label is called.
When reset_control_deassert() fails it jumps to err_clk_dis label which
disables clock and also disable pm_runtime setup but nothing has been setup
at this time of failure because initialization is done below
reset_control_deassert() call.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://lore.kernel.org/r/20250206115708.1085523-2-manikanta.guntupalli@amd.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions