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| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2020-10-14 22:19:29 +0300 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2020-10-16 00:14:29 +0300 |
| commit | 240abb3c76ff4b469f91a753adb8426b77cab914 (patch) | |
| tree | 67d4fec1c71e770a7a78723a888cf4907fae6017 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 62277f33e9c16d34f07bc18b8146c4befa92cb69 (diff) | |
| download | linux-240abb3c76ff4b469f91a753adb8426b77cab914.tar.xz | |
drm/i915/dg1: Add DG1 power wells
TGL power wells can be re-used for DG1 with the exception of the fake
power well for TC_COLD.
v2: use logic to skip power wells while copying instead of duplicating
the definition of TGL power wells (Matt Roper)
Bspec: 49182
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201014191937.1266226-3-lucas.demarchi@intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions