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| author | Venkat Reddy Talla <vreddytalla@nvidia.com> | 2020-03-10 13:43:56 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-03-13 12:53:10 +0300 |
| commit | 04fac2412ba413fc9f7f792baa0b67d92ff4d1a4 (patch) | |
| tree | a37f8ea0a2c2b7388b4853c257b6b2e13219e758 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 03e917b2a025d6a676af4c2ae9c410c049bda161 (diff) | |
| download | linux-04fac2412ba413fc9f7f792baa0b67d92ff4d1a4.tar.xz | |
soc/tegra: pmc: Add pins for Tegra194
Extend the Tegra194 IO pad table with additional information such as pin
names and 1.8/3.3 V settings to allow a table of voltage control pins to
generated from it. This is similar to what's done for older chips and is
needed to support high-speed modes for SDHCI where switching the pins to
1.8V or 3.3V is necessary.
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions