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author | Jie Zhan <zhanjie9@hisilicon.com> | 2024-09-29 06:32:14 +0300 |
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committer | Viresh Kumar <viresh.kumar@linaro.org> | 2024-10-03 08:39:44 +0300 |
commit | ea1829d4d413bc38774703acfc266472f7bc0bb5 (patch) | |
tree | d560678a6f9a46d2e6feb2d14d2b38f7b16b084b /tools/perf/scripts/python/parallel-perf.py | |
parent | c47195631960b626058c335aec31f186fa854f97 (diff) | |
download | linux-ea1829d4d413bc38774703acfc266472f7bc0bb5.tar.xz |
cppc_cpufreq: Remove HiSilicon CPPC workaround
Since commit 6c8d750f9784 ("cpufreq / cppc: Work around for Hisilicon CPPC
cpufreq"), we introduce a workround for HiSilicon platforms that do not
support performance feedback counters, whereas they can get the actual
frequency from the desired perf register. Later on, FIE is disabled in
that workaround as well.
Now the workround can be handled by the common code. Desired perf would be
read and converted to frequency if feedback counters don't change. FIE
would be disabled if the CPPC regs are in PCC region.
Hence, the workaround is no longer needed and can be safely removed, in an
effort to consolidate the driver procedure.
Signed-off-by: Jie Zhan <zhanjie9@hisilicon.com>
Reviewed-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
Reviewed-by: Huisong Li <lihuisong@huawei.com>
[ Viresh: Move fie_disabled withing CONFIG option to fix warning ]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/parallel-perf.py')
0 files changed, 0 insertions, 0 deletions