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| author | Nathan Morrisson <nmorrisson@phytec.com> | 2024-06-14 02:07:58 +0300 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2024-06-19 20:10:55 +0300 |
| commit | a0b552605f8c588fdd9ea062886fb90d50534a8d (patch) | |
| tree | b530e993ed6d04b8a9eb635770c9b46936fb8bae /tools/perf/scripts/python/parallel-perf.py | |
| parent | 1322b1796d7143dfa75e10e036c6099927ef510d (diff) | |
| download | linux-a0b552605f8c588fdd9ea062886fb90d50534a8d.tar.xz | |
arm64: dts: ti: k3-am6xx-phycore-som: Add overlay to disable rtc
Add an overlay to disable the rtc for all am6xx-phycore-som boards.
The EEPROM on am6xx-phycore-soms contains information about the
configuration of the SOM. The standard configuration of the SOM
has an rtc, but if no rtc is populated, the EEPROM will indicate that
change and we can use this overlay to cleanly disable the rtc.
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Link: https://lore.kernel.org/r/20240613230759.1984966-4-nmorrisson@phytec.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'tools/perf/scripts/python/parallel-perf.py')
0 files changed, 0 insertions, 0 deletions