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| author | Jessica Zhang <quic_jesszhan@quicinc.com> | 2025-02-15 03:14:32 +0300 |
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2025-03-05 05:34:12 +0300 |
| commit | 0f3801d666fe49069abc7883af4061c761e1bb68 (patch) | |
| tree | c53e4c223b5b74080bb1adfb2bb51e256aa399f4 /tools/perf/scripts/python/parallel-perf.py | |
| parent | dd331404ac7c155b2863038864901049fcf9d3fe (diff) | |
| download | linux-0f3801d666fe49069abc7883af4061c761e1bb68.tar.xz | |
drm/msm/dpu: Support CWB in dpu_hw_ctl
The CWB mux has a pending flush bit and *_active register.
Add support for configuring them within the dpu_hw_ctl layer.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/637492/
Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-9-a44c293cf422@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/parallel-perf.py')
0 files changed, 0 insertions, 0 deletions