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author | Biju Das <biju.das.jz@bp.renesas.com> | 2025-02-24 16:11:23 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2025-02-26 13:59:50 +0300 |
commit | 0a9d6ef64e5e917f93db98935cd09bac38507ebf (patch) | |
tree | 863d4039ca6914947d32051dde54fcdf7d016376 /tools/perf/scripts/python/parallel-perf.py | |
parent | 5ec8cabc3b8622f95de973c1a245245c65e3337b (diff) | |
download | linux-0a9d6ef64e5e917f93db98935cd09bac38507ebf.tar.xz |
irqchip/renesas-rzv2h: Add struct rzv2h_hw_info with t_offs variable
The ICU block on the RZ/G3E SoC is almost identical to the one found on
the RZ/V2H SoC, with the following differences:
- The TINT register base offset is 0x800 instead of zero.
- The number of GPIO interrupts for TINT selection is 141 instead of 86.
- The pin index and TINT selection index are not in the 1:1 map
- The number of TSSR registers is 16 instead of 8
- Each TSSR register can program 2 TINTs instead of 4 TINTs
Introduce struct rzv2h_hw_info to describe the SoC properties and refactor
the code by moving rzv2h_icu_init() into rzv2h_icu_init_common() and pass
the variable containing hw difference to support both these SoCs.
As a first step add t_offs to the new struct and replace the hardcoded
constants in the code.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/all/20250224131253.134199-8-biju.das.jz@bp.renesas.com
Diffstat (limited to 'tools/perf/scripts/python/parallel-perf.py')
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