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| author | Kan Liang <kan.liang@linux.intel.com> | 2024-06-14 16:46:31 +0300 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2024-06-17 18:57:59 +0300 |
| commit | f8a86a9bb5f7e65d8c4405052de062639a8783bb (patch) | |
| tree | 49d59e7d6a89d6df185fcae84b95aeb9113df527 /tools/perf/scripts/python/net_dropmonitor.py | |
| parent | 15a4bd51853b9c67f49bb03c20b6b6cb60fd204f (diff) | |
| download | linux-f8a86a9bb5f7e65d8c4405052de062639a8783bb.tar.xz | |
perf/x86/intel/uncore: Support HBM and CXL PMON counters
Unknown uncore PMON types can be found in both SPR and EMR with HBM or
CXL.
$ls /sys/devices/ | grep type
uncore_type_12_16
uncore_type_12_18
uncore_type_12_2
uncore_type_12_4
uncore_type_12_6
uncore_type_12_8
uncore_type_13_17
uncore_type_13_19
uncore_type_13_3
uncore_type_13_5
uncore_type_13_7
uncore_type_13_9
The unknown PMON types are HBM and CXL PMON. Except for the name, the
other information regarding the HBM and CXL PMON counters can be
retrieved via the discovery table. Add them into the uncores tables for
SPR and EMR.
The event config registers for all CXL related units are 8-byte apart.
Add SPR_UNCORE_MMIO_OFFS8_COMMON_FORMAT to specially handle it.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Yunying Sun <yunying.sun@intel.com>
Link: https://lore.kernel.org/r/20240614134631.1092359-9-kan.liang@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python/net_dropmonitor.py')
0 files changed, 0 insertions, 0 deletions