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| author | Sam Protsenko <semen.protsenko@linaro.org> | 2024-01-20 04:29:46 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2024-01-24 18:11:43 +0300 |
| commit | 0229278bf33ea69cc1bba12c287f173e9b18c1f8 (patch) | |
| tree | 08c14984ef4de4cfe1c6bb427816ac620d01246d /tools/perf/scripts/python/net_dropmonitor.py | |
| parent | 18ab9e9e8889ecba23a5e8b7f8924f09284e33d8 (diff) | |
| download | linux-0229278bf33ea69cc1bba12c287f173e9b18c1f8.tar.xz | |
spi: s3c64xx: Add Exynos850 support
Add SPI port configuration for Exynos850 SoC. It has 3 USI blocks which
can be configured in SPI mode:
* spi_0: BLK_PERI_SPI_0 (0x13940000)
* spi_1: BLK_ALIVE_USI_CMGP00 (0x11d00000)
* spi_2: BLK_ALIVE_USI_CMGP01 (0x11d20000)
SPI FIFO depth is 64 bytes for all those SPI blocks, so the
.fifo_lvl_mask value is set to 0x7f. All blocks have DIV_4 as the
default internal clock divider, and an internal loopback mode to run
a loopback test.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://msgid.link/r/20240120012948.8836-6-semen.protsenko@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/net_dropmonitor.py')
0 files changed, 0 insertions, 0 deletions