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| author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2024-05-09 08:14:57 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2024-06-15 10:37:50 +0300 |
| commit | f560da940e3271166a19c17bfe8bcb45490d7767 (patch) | |
| tree | 066745509b3a83a1ac66486e730078ae0f2a7d3e /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 41f93a496af2696d970cbcb3814261a9b32dbaa2 (diff) | |
| download | linux-f560da940e3271166a19c17bfe8bcb45490d7767.tar.xz | |
arm64: dts: imx8mp: Initialize audio PLLs from audiomix subsystem
Initialize audio PLL1 as the parent clock for 8kHz series rates,
audio PLL2 as the parent clock for 11kHz series rates. that PLL1
and PLL2 can together support full range of audio sample rates.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions