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| author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2023-03-10 15:34:58 +0300 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2023-03-21 21:06:24 +0300 |
| commit | cdce67099117ece371582f706c6eff7d3a65326d (patch) | |
| tree | e46a9f50c1409a66a1e7c3cc0b589695aa4a3a4f /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | fe15c26ee26efa11741a7b632e9f23b01aca4cc6 (diff) | |
| download | linux-cdce67099117ece371582f706c6eff7d3a65326d.tar.xz | |
PCI: dwc: Fix PORT_LINK_CONTROL update when CDM check enabled
If CDM_CHECK is enabled (by the DT "snps,enable-cdm-check" property), 'val'
is overwritten by PCIE_PL_CHK_REG_CONTROL_STATUS initialization. Commit
ec7b952f453c ("PCI: dwc: Always enable CDM check if "snps,enable-cdm-check"
exists") did not account for further usage of 'val', so we wrote improper
values to PCIE_PORT_LINK_CONTROL when the CDM check is enabled.
Move the PCIE_PORT_LINK_CONTROL update to be completely after the
PCIE_PL_CHK_REG_CONTROL_STATUS register initialization.
[bhelgaas: commit log adapted from Serge's version]
Fixes: ec7b952f453c ("PCI: dwc: Always enable CDM check if "snps,enable-cdm-check" exists")
Link: https://lore.kernel.org/r/20230310123510.675685-2-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions