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author | Sakari Ailus <sakari.ailus@linux.intel.com> | 2020-08-07 12:00:59 +0300 |
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committer | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2020-12-07 17:57:07 +0300 |
commit | c4c0b222720d413cc866275a0200019eb3c58f33 (patch) | |
tree | 9b3469ff28633d2ef2fcdd1df09ba8794e18ba51 /tools/perf/scripts/python/mem-phys-addr.py | |
parent | 4e1e8d240dff96bd8dd2c00c5fcd7f04088ace3c (diff) | |
download | linux-c4c0b222720d413cc866275a0200019eb3c58f33.tar.xz |
media: ccs-pll: Support two cycles per pixel on OP domain
The l parameter defines the number of clock cycles to process a single
pixel per OP lane. It is calculated based on a new register
op_bits_per_lane.
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions