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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-05-02 15:32:20 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2019-05-20 14:27:35 +0300 |
| commit | 35b81a037b2ee78f05d17e0856f0005ad8fc67f1 (patch) | |
| tree | 1c79bbe3741491f5007154ed43cac543a9fa3d7f /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | bd6ed4674358e482f72abe853a42477a800cadbc (diff) | |
| download | linux-35b81a037b2ee78f05d17e0856f0005ad8fc67f1.tar.xz | |
ARM: dts: rskrza1: Add input switches
Add support for input switches SW1-3 on the Renesas RZ/A1 RSK+RZA1
development board.
Note that this uses the IRQ interrupts, as the RZ/A1 GPIO controller
does not include interrupt support.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions