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author | Hersen Wu <hersenxs.wu@amd.com> | 2023-03-10 00:14:08 +0300 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2023-03-22 08:07:04 +0300 |
commit | 2fedafc7ef071979b07fe9e9ccb7af210b65da0e (patch) | |
tree | cffdc409400d3ae1d60f2dac1c4853f0642962da /tools/perf/scripts/python/mem-phys-addr.py | |
parent | 1c1f61057c10107d15093522c097d9bf54703ae3 (diff) | |
download | linux-2fedafc7ef071979b07fe9e9ccb7af210b65da0e.tar.xz |
drm/amd/display: fix wrong index used in dccg32_set_dpstreamclk
[Why & How]
When merging commit 9af611f29034
("drm/amd/display: Fix DCN32 DPSTREAMCLK_CNTL programming"),
index change was not picked up.
Cc: stable@vger.kernel.org
Cc: Mario Limonciello <mario.limonciello@amd.com>
Fixes: 9af611f29034 ("drm/amd/display: Fix DCN32 DPSTREAMCLK_CNTL programming")
Reviewed-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions