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| author | Atish Patra <atish.patra@wdc.com> | 2021-03-03 23:02:52 +0300 |
|---|---|---|
| committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2021-04-26 18:31:32 +0300 |
| commit | 2951162094e61f574b0ddf886c783ace65049450 (patch) | |
| tree | 4d518abdb46cab13b746c5c28068896d2918cab5 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 0fa6107eca4186adc6adda3b54c8b942477066c1 (diff) | |
| download | linux-2951162094e61f574b0ddf886c783ace65049450.tar.xz | |
RISC-V: Enable Microchip PolarFire ICICLE SoC
Enable Microchip PolarFire ICICLE soc config in defconfig.
It allows the default upstream kernel to boot on PolarFire ICICLE board.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions