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| author | Bibo Mao <maobibo@loongson.cn> | 2025-03-08 08:51:59 +0300 |
|---|---|---|
| committer | Huacai Chen <chenhuacai@loongson.cn> | 2025-03-08 08:51:59 +0300 |
| commit | 6fb1867d5a44b0a061cf39d2492d23d314bcb8ce (patch) | |
| tree | bc12e46a6e123b62d8252503042a18c485418a13 /tools/perf/scripts/python/libxed.py | |
| parent | 3109d5ff484b7bc7b955f166974c6776d91f247b (diff) | |
| download | linux-6fb1867d5a44b0a061cf39d2492d23d314bcb8ce.tar.xz | |
LoongArch: KVM: Add interrupt checking for AVEC
There is a newly added macro INT_AVEC with CSR ESTAT register, which is
bit 14 used for LoongArch AVEC support. AVEC interrupt status bit 14 is
supported with macro CSR_ESTAT_IS, so here replace the hard-coded value
0x1fff with macro CSR_ESTAT_IS so that the AVEC interrupt status is also
supported by KVM.
Cc: stable@vger.kernel.org
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'tools/perf/scripts/python/libxed.py')
0 files changed, 0 insertions, 0 deletions