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| author | Rob Clark <robdclark@chromium.org> | 2025-03-17 18:00:06 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2025-04-19 01:15:24 +0300 |
| commit | 9d78f02503227d3554d26cf8ca73276105c98f3e (patch) | |
| tree | a58649aa46cff7b87318146a9088fc9703195be0 /tools/perf/scripts/python/intel-pt-events.py | |
| parent | ddfa00afae800b3dea02fa36f3f4012a8379ae58 (diff) | |
| download | linux-9d78f02503227d3554d26cf8ca73276105c98f3e.tar.xz | |
drm/msm/a6xx+: Don't let IB_SIZE overflow
IB_SIZE is only b0..b19. Starting with a6xx gen3, additional fields
were added above the IB_SIZE. Accidentially setting them can cause
badness. Fix this by properly defining the CP_INDIRECT_BUFFER packet
and using the generated builder macro to ensure unintended bits are not
set.
v2: add missing type attribute for IB_BASE
v3: fix offset attribute in xml
Reported-by: Connor Abbott <cwabbott0@gmail.com>
Fixes: a83366ef19ea ("drm/msm/a6xx: add A640/A650 to gpulist")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/643396/
Diffstat (limited to 'tools/perf/scripts/python/intel-pt-events.py')
0 files changed, 0 insertions, 0 deletions