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authorRobin Murphy <robin.murphy@arm.com>2022-08-15 18:26:50 +0300
committerJoerg Roedel <jroedel@suse.de>2022-09-07 15:16:39 +0300
commitdf198b37e72c18c771d93ffbaf2176c0270505f3 (patch)
tree543a690a15dcacc5c4ce79b7778b72b208c8fdfb /tools/perf/scripts/python/exported-sql-viewer.py
parent359ad15763762c713a51300134e784a72eb9cb80 (diff)
downloadlinux-df198b37e72c18c771d93ffbaf2176c0270505f3.tar.xz
iommu/arm-smmu: Report IOMMU_CAP_CACHE_COHERENCY better
Assuming that any SMMU can enforce coherency for any device is clearly nonsense. Although technically even a single SMMU instance can be wired up to only be capable of emitting coherent traffic for some of the devices it translates, it's a fairly realistic approximation that if the SMMU's pagetable walker is wired up to a coherent interconnect then all its translation units probably are too, and conversely that lack of coherent table walks implies a non-coherent system in general. Either way it's still less inaccurate than what we've been claiming so far. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/106c9741415f0b6358c72d53ae9c78c553a2b45c.1660574547.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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