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authorXiaojie Yuan <xiaojie.yuan@amd.com>2019-08-21 16:00:29 +0300
committerAlex Deucher <alexander.deucher@amd.com>2019-08-23 01:25:01 +0300
commit9e48495017342c5d445b25eedd86d6fd884a6496 (patch)
treeff150afc5849621f995f4e18aebfc24693495c4d /tools/perf/scripts/python/exported-sql-viewer.py
parentdf2f10151d64d0c7d51deccdca69ca2c9fdcb5d3 (diff)
downloadlinux-9e48495017342c5d445b25eedd86d6fd884a6496.tar.xz
drm/amdgpu/sdma5: fix number of sdma5 trap irq types for navi1x
v2: set num_types based on num_instances navi1x has 2 sdma engines but commit "e7b58d03b678 drm/amdgpu: reorganize sdma v4 code to support more instances" changes the max number of sdma irq types (AMDGPU_SDMA_IRQ_LAST) from 2 to 8 which causes amdgpu_irq_gpu_reset_resume_helper() to recover irq of sdma engines with following logic: (enable irq for sdma0) * 1 time (enable irq for sdma1) * 1 time (disable irq for sdma1) * 6 times as a result, after gpu reset, interrupt for sdma1 is lost. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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