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authorAndre Przywara <andre.przywara@arm.com>2023-03-20 03:52:47 +0300
committerJernej Skrabec <jernej.skrabec@gmail.com>2023-03-27 23:45:22 +0300
commit927e310e8e9d891b7621f77c369d234624d3a4fe (patch)
treebfdb7ad5b805bf33f4ced6d748471631126ae606 /tools/perf/scripts/python/exported-sql-viewer.py
parenta3eebcb61ffb9a26ca77a00ce80050cff0f0ecf3 (diff)
downloadlinux-927e310e8e9d891b7621f77c369d234624d3a4fe.tar.xz
ARM: dts: sunxi: add Allwinner T113-s SoC .dtsi
The Allwinner T113-s SoC is apparently using the same (or at least a very similar) die as the D1/D1s, but replaces the single RISC-V core with two Arm Cortex-A7 cores. Since the D1 core .dtsi already describes all common peripherals, we just need a DT describing the ARM specific peripherals: the CPU cores, the Generic Timer, the GIC and the PMU. We include the core .dtsi directly from the riscv DT directory. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230320005249.13403-3-andre.przywara@arm.com Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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