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authorConor Dooley <conor.dooley@microchip.com>2023-04-06 00:20:55 +0300
committerConor Dooley <conor.dooley@microchip.com>2023-04-06 00:23:17 +0300
commit4cd4beb98fe5ac2c4bcb995ba6e82322be174abb (patch)
tree5f511ff3d23f2c188631bbc8cb7e585de424d944 /tools/perf/scripts/python/exported-sql-viewer.py
parente77da13b8e3626fc6d01287fba7c1eee4ebfe018 (diff)
parent54baba33392d428a8be4942441a92a9b05cf537e (diff)
downloadlinux-4cd4beb98fe5ac2c4bcb995ba6e82322be174abb.tar.xz
Merge branch 'riscv-jh7110_initial_dts' into riscv-dt-for-next
Merge Hal's series adding support for the new StarFive JH7110 SoC. There's a few bindings here for core components that were not picked up by the various maintainers for the subsystems (previously Palmer would pick these up via the RISC-V tree) & the first two commits in the branch are shared with the clk tree, since the dts depends on defines in the dt-binding headers. This is based on -rc2, as the board does not actually boot on -rc1 due to the bug Linus introduced. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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