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authorJacopo Mondi <jacopo@jmondi.org>2022-11-04 17:24:47 +0300
committerMauro Carvalho Chehab <mchehab@kernel.org>2022-11-25 11:44:06 +0300
commit3a51fd71b6f59610abad0e88315c20fd3e5b4b79 (patch)
tree42bc5253680ce23ba0b38f00489eaa8cc235064b /tools/perf/scripts/python/exported-sql-viewer.py
parente4bdc249a9ac3c3721029609eccd51bf558a7f84 (diff)
downloadlinux-3a51fd71b6f59610abad0e88315c20fd3e5b4b79.tar.xz
media: ar0521: Rework PLL computation
Rework the PLL computation procedure to take into account the currently configured format bpp and the number of data lanes. Comment the PLL configuration procedure with information provided by the sensor chip manual and remove the hardcoded divider from the pixel clock calculation. Signed-off-by: Jacopo Mondi <jacopo@jmondi.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
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