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authorchen gong <curry.gong@amd.com>2021-01-29 10:37:45 +0300
committerAlex Deucher <alexander.deucher@amd.com>2021-02-02 20:06:29 +0300
commit2cb96b238701aae8d86bb63ba19eaeb34f5bfa26 (patch)
tree94cf79499904c6b71628c3e12b283b15b74deacb /tools/perf/scripts/python/exported-sql-viewer.py
parente1a4b67aac9ee870b4d95a008d47910c47db3092 (diff)
downloadlinux-2cb96b238701aae8d86bb63ba19eaeb34f5bfa26.tar.xz
drm/amdgpu/gfx10: update CGTS_TCC_DISABLE and CGTS_USER_TCC_DISABLE register offsets for VGH
For Vangogh: The offset of the CGTS_TCC_DISABLE is 0x5006 by calculation. The offset of the CGTS_USER_TCC_DISABLE is 0x5007 by calculation. Signed-off-by: chen gong <curry.gong@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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