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| author | Lucas Stach <l.stach@pengutronix.de> | 2022-07-06 16:28:11 +0300 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2022-08-11 02:45:32 +0300 |
| commit | ea6490b02240bd7939a3a13bc8d3f25046c01585 (patch) | |
| tree | 097c4c173edc7f36c446149cb7d74b0243a3d9cc /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 5fa9e16191204b6ead0c31e8f3b6ef92ddd8183e (diff) | |
| download | linux-ea6490b02240bd7939a3a13bc8d3f25046c01585.tar.xz | |
drm/bridge: tc358767: increase CLRSIPO count
The current CLRSIPO count is marginal and does not work with high
DSI clock rates. Increase it a bit to allow the DSI link to work at
up to 1Gbps lane speed.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220706132812.2171250-2-l.stach@pengutronix.de
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions