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authorAnatoliy Klymenko <anatoliy.klymenko@amd.com>2024-01-24 05:53:58 +0300
committerTomi Valkeinen <tomi.valkeinen@ideasonboard.com>2024-02-07 16:16:51 +0300
commite8ef91f14db1d4259c570a543b0927d7c72fcc31 (patch)
treec3624dfa120952900437c58d7653047bfb7b4401 /tools/perf/scripts/python/export-to-sqlite.py
parent0e85f1ae4ac6dae238b0f35232d1aa52e1b6943f (diff)
downloadlinux-e8ef91f14db1d4259c570a543b0927d7c72fcc31.tar.xz
drm: xlnx: zynqmp_dpsub: Make drm bridge discoverable
ZynqMP DPSUB supports 2 input modes: DMA based and live video. In the first mode, the driver implements CRTC and DP encoder DRM bridge to model the complete display pipeline. In this case, DRM bridge is being directly instantiated within the driver, not using any bridge discovery mechanisms. In the live video input mode video signal is generated by FPGA fabric and passed into DPSUB over the connected bus. In this mode driver exposes the DP encoder as a DRM bridge, expecting external CRTC to discover it via drm_of_find_panel_or_bridge() or a similar call. This discovery relies on drm_bridge.of_node being properly set. Assign device OF node to the bridge prior to registering it. This will make said bridge discoverable by an external CRTC driver. Signed-off-by: Anatoliy Klymenko <anatoliy.klymenko@amd.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240124025402.373620-2-anatoliy.klymenko@amd.com
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