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| author | Oscar Mateo <oscar.mateo@intel.com> | 2018-05-09 00:29:24 +0300 |
|---|---|---|
| committer | Mika Kuoppala <mika.kuoppala@linux.intel.com> | 2018-05-11 15:54:18 +0300 |
| commit | d65dc3e40b80ab63fb0d70c947558d0f49f912da (patch) | |
| tree | 2582b3bbba2fcc4bae19f611ea553bffa7835cd1 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | cc38cae7c4e9350c93aa2da506086415fecd6e4a (diff) | |
| download | linux-d65dc3e40b80ab63fb0d70c947558d0f49f912da.tar.xz | |
drm/i915/icl: Enable Sampler DFR
Sampler Dynamic Frequency Rebalancing (DFR) aims to reduce Sampler
power by dynamically changing its clock frequency in low-throughput
conditions. This patches enables it by default on Gen11.
v2: Wrong operation to clear the bit (Praveen)
v3: Rebased on top of the WA refactoring
v4: Move to icl_init_clock_gating, since it's not a WA (Rodrigo)
v5: C, not lisp (Chris)
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Praveen Paneri <praveen.paneri@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1525814984-20039-3-git-send-email-oscar.mateo@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions