summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/export-to-sqlite.py
diff options
context:
space:
mode:
authorCharlie Jenkins <charlie@rivosinc.com>2024-11-14 05:21:08 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2025-01-18 23:33:27 +0300
commitbf6279b38a4bbdb2954c3d159523d41367763a48 (patch)
treebef3a8737d1639690128a3598209a9c3b62000ea /tools/perf/scripts/python/export-to-sqlite.py
parente576b7cb818343e2dc740185fbea6af580763dde (diff)
downloadlinux-bf6279b38a4bbdb2954c3d159523d41367763a48.tar.xz
dt-bindings: cpus: add a thead vlen register length property
Add a property analogous to the vlenb CSR so that software can detect the vector length of each CPU prior to it being brought online. Currently software has to assume that the vector length read from the boot CPU applies to all possible CPUs. On T-Head CPUs implementing pre-ratification vector, reading the th.vlenb CSR may produce an illegal instruction trap, so this property is required on such systems. Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Yangyu Chen <cyy@cyyself.name> Link: https://lore.kernel.org/r/20241113-xtheadvector-v11-2-236c22791ef9@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions