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author | Gustavo Sousa <gustavo.sousa@intel.com> | 2024-01-05 17:05:35 +0300 |
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committer | Matt Roper <matthew.d.roper@intel.com> | 2024-01-08 21:55:44 +0300 |
commit | bdb7a38a8f409cdc3acdfc1935d09e31735e3ab4 (patch) | |
tree | a1ca0d7cb4f13b98644d731f7294abb3d0150c14 /tools/perf/scripts/python/export-to-sqlite.py | |
parent | d544d000a3cbf845825508dafe0aebe7f93f0e04 (diff) | |
download | linux-bdb7a38a8f409cdc3acdfc1935d09e31735e3ab4.tar.xz |
drm/i915/xe2lpd: Update bxt_sanitize_cdclk()
With Xe2_LPD, there were changes to the way CDCLK_CTL must be
programmed. Those were reflected on _bxt_set_cdclk() with commit
3d3696c0fed1 ("drm/i915/lnl: Start using CDCLK through PLL"), but
bxt_sanitize_cdclk() was left out.
This was causing some issues when loading the driver with a pre-existing
active display configuration: the driver would mistakenly take the
current value of CDCLK_CTL as wrong and the sanitization would be
triggered.
In a scenario where the display was already configured with a high
CDCLKC and had plane(s) enabled, FIFO underrun errors were reported,
because the current sanitization code selects the minimum possible
CDCLK.
Fix that by updating bxt_sanitize_cdclk() to match the changes made in
_bxt_set_cdclk(). Ideally, we would have a common function to derive the
value for CDCLK_CTL, but that can be done in a future change.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240105140538.183553-2-gustavo.sousa@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions