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| author | Paul Barker <paul.barker.ct@bp.renesas.com> | 2024-03-20 11:28:30 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-03-26 11:30:44 +0300 |
| commit | b8ae9d344d09b73361493054fbde15b9f5ebe91a (patch) | |
| tree | 44d79054c097c36228c0291614c5561fc15b7378 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | c69fe2ae2e7f203bbfbd6dd1757d3b290bce8509 (diff) | |
| download | linux-b8ae9d344d09b73361493054fbde15b9f5ebe91a.tar.xz | |
clk: renesas: r9a07g043: Mark mod_clks and resets arrays as const
The r9a07g043_mod_clks and r9a07g043_resets arrays describe the module
clocks and reset signals (respectively) in this SoC and do not change at
runtime.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240320082831.9666-1-paul.barker.ct@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions