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| author | Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> | 2024-02-05 14:56:03 +0300 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2024-02-09 15:16:23 +0300 |
| commit | b7731065523048276a80c8e16120208153438930 (patch) | |
| tree | 9c3658567f344689a1d84518bb9911e20a6740ff /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | fda5108ebafe7797dc8e1279f04e6e9145c9ad10 (diff) | |
| download | linux-b7731065523048276a80c8e16120208153438930.tar.xz | |
iommu/amd: Introduce per-device GCR3 table
AMD IOMMU GCR3 table is indexed by PASID. Each entry stores guest CR3
register value, which is an address to the root of guest IO page table.
The GCR3 table can be programmed per-device. However, Linux AMD IOMMU
driver currently managing the table on a per-domain basis.
PASID is a device feature. When SVA is enabled it will bind PASID to
device, not domain. Hence it makes sense to have per device GCR3 table.
Introduce struct iommu_dev_data.gcr3_tbl_info to keep track of GCR3 table
configuration. This will eventually replaces gcr3 related variables in
protection_domain structure.
Suggested-by: Jason Gunthorpe <jgg@ziepe.ca>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20240205115615.6053-6-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions