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| author | Thippeswamy Havalige <thippesw@amd.com> | 2024-06-24 14:10:22 +0300 |
|---|---|---|
| committer | Krzysztof Wilczyński <kwilczynski@kernel.org> | 2024-07-04 17:46:09 +0300 |
| commit | a3ec59e982e08366fa755730bbe803f7ed042391 (patch) | |
| tree | 23f43fd05a730bdd5eb285fb23afea1c3bb97f80 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 743025b0e072dafa6e176409eaac6e0ee203b6b3 (diff) | |
| download | linux-a3ec59e982e08366fa755730bbe803f7ed042391.tar.xz | |
dt-bindings: PCI: xilinx-cpm: Fix overlapping of bridge register and 32-bit BAR addresses
The current configuration had non-prefetchable memory overlapping with
bridge registers by 64KB from base address.
This patch fixes the 'ranges' property in the device tree by adjusting
the non-prefetchable memory addresses beyond the 64KB mark to prevent
conflicts.
[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20240624111022.133780-1-thippesw@amd.com
Signed-off-by: Thippeswamy Havalige <thippesw@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions