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authorPotin Lai <potin.lai.pt@gmail.com>2022-05-09 18:11:17 +0300
committerJoel Stanley <joel@jms.id.au>2022-05-19 10:27:45 +0300
commit9495c6d570600e275253036aa993735db8bd2451 (patch)
tree83885f8f863b633e26fb8055002d2f0bfbe9af39 /tools/perf/scripts/python/export-to-sqlite.py
parent60280a214a41d896093daf162e7273338ebd396c (diff)
downloadlinux-9495c6d570600e275253036aa993735db8bd2451.tar.xz
ARM: dts: aspeed: bletchley: add pca9536 node on each sled
Add an ioexp node on each sled baseed on DVT schematic, address at 0x41. P0: SLEDX_SWD_MUX P1: SLEDX_XRES_SWD_N P2: SLEDX_CLKREQ_N P3: SLEDX_PCIE_PWR_EN Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-6-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
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