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| author | Petr Machata <petrm@mellanox.com> | 2018-08-09 11:59:13 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-08-09 20:36:11 +0300 |
| commit | 88cc318ebd8740eae4784566757cbbc760244f5b (patch) | |
| tree | d56459574122f2d291e9b94f9e6f88260030b4af /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 9897dce2e39aa2f1fa7260b4a936a34f3fc6e775 (diff) | |
| download | linux-88cc318ebd8740eae4784566757cbbc760244f5b.tar.xz | |
mlxsw: spectrum: Expose counter for all 16 TCs
Before MC-aware mode was enabled in commit 7b8195306694 ("mlxsw:
spectrum: Configure MC-aware mode on mlxsw ports"), only 8 traffic
classes were used. Under MC-aware regime, however, besides using TCs
0-7 for UC traffic, it additionally uses TCs 8-15 for BUM traffic. It
is therefore desirable to show counters for these TCs as well.
Update ethtool stats pool length, mlxsw_sp_port_get_strings() and
mlxsw_sp_port_get_stats() to include artifacts for all 16 TCs. For
consistency and simplicity, expose tc_no_buffer_discard_uc_tc for BUM
TCs as well, even though it ought to stay at 0 all the time.
Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions