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authorBiju Das <biju.das.jz@bp.renesas.com>2024-06-05 18:41:15 +0300
committerRob Herring (Arm) <robh@kernel.org>2024-06-07 00:00:51 +0300
commit83138f8fb798627531be3b5627af4a6008a7bbd6 (patch)
tree1d528c14d5c5c67742bc4148b07f79d6d88f195e /tools/perf/scripts/python/export-to-sqlite.py
parent77b023ba4f45ce2bf26edb095b4a81829c9e621b (diff)
downloadlinux-83138f8fb798627531be3b5627af4a6008a7bbd6.tar.xz
media: dt-bindings: renesas,rzg2l-cru: Document Renesas RZ/G2UL CRU block
Document the CRU IP found in Renesas RZ/G2UL SoC. The CRU block on the RZ/G2UL SoC is identical to one found on the RZ/G2L SoC, but it does not support parallel input. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240605154115.263447-3-biju.das.jz@bp.renesas.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
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