diff options
| author | Prike Liang <Prike.Liang@amd.com> | 2020-03-02 04:36:15 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-03-05 17:42:08 +0300 |
| commit | 80381d40c9bf5218db06a7d7246c5478c95987ee (patch) | |
| tree | f3f6ea8f9e2b320e5a17fd67e0e00783d21a9214 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | a0275dfc82c9034eefbeffd556cca6dd239d7925 (diff) | |
| download | linux-80381d40c9bf5218db06a7d7246c5478c95987ee.tar.xz | |
drm/amd/powerplay: fix pre-check condition for setting clock range
This fix will handle some MP1 FW issue like as mclk dpm table in renoir has a reverse
dpm clock layout and a zero frequency dpm level as following case.
cat pp_dpm_mclk
0: 1200Mhz
1: 1200Mhz
2: 800Mhz
3: 0Mhz
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions