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| author | Stephen Boyd <sboyd@kernel.org> | 2023-12-17 03:28:56 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2023-12-17 03:28:56 +0300 |
| commit | 723facbbb56048645ab59554801b278c3b7f08b7 (patch) | |
| tree | 7c9b2a3421ee51e025fb8a0512e4ffb583465008 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | b85ea95d086471afb4ad062012a4d73cd328fa86 (diff) | |
| parent | 721bf080f249ab2adcc4337abe164230bfb8594f (diff) | |
| download | linux-723facbbb56048645ab59554801b278c3b7f08b7.tar.xz | |
Merge tag 'v6.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip
Pull Rockchip clk driver updates from Heiko Stuebner:
Two new pll rates and an additional critical clock on rk3568.
* tag 'v6.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: rk3568: Mark pclk_usb as critical
clk: rockchip: rk3568: Add PLL rate for 126.4MHz
clk: rockchip: rk3568: Add PLL rate for 115.2MHz
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions