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authorAustin Christ <austinwc@codeaurora.org>2018-05-10 19:13:56 +0300
committerWolfram Sang <wsa@the-dreams.de>2018-05-29 20:53:03 +0300
commit71fbafcc45fed7c647987495900b8f6ff29fc5aa (patch)
treeff2e9e70e5065888adeb6a99ba595c53b19b7e64 /tools/perf/scripts/python/export-to-sqlite.py
parent109b8c42b7e28ddf843488f01f243a9c9eba032b (diff)
downloadlinux-71fbafcc45fed7c647987495900b8f6ff29fc5aa.tar.xz
i2c: qup: Correct duty cycle for FM and FM+
The I2C spec UM10204 Rev. 6 specifies the following timings. Standard Fast Mode Fast Mode Plus SCL low 4.7us 1.3us 0.5us SCL high 4.0us 0.6us 0.26us This results in a 33%/66% duty cycle as opposed to the 50%/50% duty cycle used for Standard-mode. Add High Time Divider settings to correct duty cycle for FM(400kHz) and FM+(1MHz). Signed-off-by: Austin Christ <austinwc@codeaurora.org> Reviewed-by: Sricharan R <sricharan@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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