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| author | Liu Peibao <liupeibao@loongson.cn> | 2022-11-14 14:38:24 +0300 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2022-11-26 14:54:11 +0300 |
| commit | 6b2748ada244c7597e9b677a0bdda4e8781a8d8f (patch) | |
| tree | 88d42dda6f6ed3777d6e0b206dfdc1b8eec1bc38 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 855d4ca4bdb366aab3d43408b74e02ab629d1d55 (diff) | |
| download | linux-6b2748ada244c7597e9b677a0bdda4e8781a8d8f.tar.xz | |
dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller
Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how
the 14 IRQs are wired to the platform's internal interrupt controller by
devicetree.
Signed-off-by: Liu Peibao <liupeibao@loongson.cn>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221114113824.1880-3-liupeibao@loongson.cn
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions