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authorChris Morgan <macromorgan@hotmail.com>2023-12-04 21:57:17 +0300
committerHeiko Stuebner <heiko@sntech.de>2023-12-05 12:43:42 +0300
commit685da6972647b486980c0cc8fd6bb5d3863fd6b7 (patch)
treee99753bff348eb1fb1c969c5ecbf47ffe9eb933f /tools/perf/scripts/python/export-to-sqlite.py
parent48794cd57a67246acc53a3edfdececdbb5b98453 (diff)
downloadlinux-685da6972647b486980c0cc8fd6bb5d3863fd6b7.tar.xz
clk: rockchip: rk3568: Add PLL rate for 126.4MHz
Add support for a PLL rate of 126.4MHz so that the Powkiddy X55 panel can run at a requested 60hz. I have confirmed this rate fits with all the constraints listed in the TRM for the VPLL (as an integer PLL) in Part 1 "Chapter 2 Clock & Reset Unit (CRU)." Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20231204185719.569021-9-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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