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| author | Jia-Wei Chang <jia-wei.chang@mediatek.com> | 2022-04-08 07:58:58 +0300 |
|---|---|---|
| committer | Viresh Kumar <viresh.kumar@linaro.org> | 2022-04-26 09:39:10 +0300 |
| commit | 4b9ceb757bbb4e8e5769eb1f1ba84bd631e63a43 (patch) | |
| tree | c7975bdd57dd62c42a91fe87584a5873dc6e55a4 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | ad975857818b0135bf13b72f66045e2699de5ba0 (diff) | |
| download | linux-4b9ceb757bbb4e8e5769eb1f1ba84bd631e63a43.tar.xz | |
cpufreq: mediatek: Enable clocks and regulators
We need to enable regulators so that the max and min requested values will
be recorded.
The intermediate clock is not always enabled by CCF in different projects,
so we should enable it in the cpufreq driver.
Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions