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| author | Sebastian Reichel <sebastian.reichel@collabora.com> | 2024-04-09 01:50:29 +0300 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2024-04-12 14:29:26 +0300 |
| commit | 2f70bbddeb457580cef3ceb574506083b9272188 (patch) | |
| tree | f797669b98ff707a2c2316c2fc08dcfacb2df7f9 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | a75d8056e9fefa82ca2bd75a32febc44411cc5c0 (diff) | |
| download | linux-2f70bbddeb457580cef3ceb574506083b9272188.tar.xz | |
phy: rockchip: add usbdp combo phy driver
This adds a new USBDP combo PHY with Samsung IP block driver.
The driver get lane mux and mapping info in 2 ways, supporting
DisplayPort alternate mode or parsing from DT. When parsing from DT,
the property "rockchip,dp-lane-mux" provide the DP mux and mapping
info. This is needed when the PHY is not used with TypeC Alt-Mode.
For example if the USB3 interface of the PHY is connected to a USB
Type A connector and the DP interface is connected to a DisplayPort
connector.
When do DP link training, need to set lane number, link rate, swing,
and pre-emphasis via PHY configure interface.
Co-developed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Co-developed-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Co-developed-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240408225109.128953-3-sebastian.reichel@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions