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| author | Niklas Cassel <niklas.cassel@axis.com> | 2017-12-20 02:29:24 +0300 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2017-12-21 14:09:44 +0300 |
| commit | 1cab826b30c6275d479a6ab1dea1067e15dbec62 (patch) | |
| tree | 5400206c80bdeaab86d4f910dc9712adcf9c3b8d /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 099a95f3591ade29da52131895a3ba9f92a0e82c (diff) | |
| download | linux-1cab826b30c6275d479a6ab1dea1067e15dbec62.tar.xz | |
PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable
Certain registers that pcie-designware-ep tries to write to are read-only
registers. However, these registers can become read/write if we first
enable the DBI_RO_WR_EN bit. Set/unset the DBI_RO_WR_EN bit before/after
writing these registers.
Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Joao Pinto <jpinto@synopsys.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions