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| author | Ben Levinsky <ben.levinsky@amd.com> | 2024-04-10 20:08:25 +0300 |
|---|---|---|
| committer | Jassi Brar <jassisinghbrar@gmail.com> | 2024-05-01 04:13:07 +0300 |
| commit | 0ac39d85a7415cb2e68a8d239f3d2f67175a14fe (patch) | |
| tree | 9523ab245a6b543b7e467879187b7eb910552c78 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 41bcf30100c521c73f0fcf05c3dc31967e6408be (diff) | |
| download | linux-0ac39d85a7415cb2e68a8d239f3d2f67175a14fe.tar.xz | |
mailbox: zynqmp: Enable Bufferless IPI usage on Versal-based SOC's
On Xilinx-AMD Versal and Versal-NET, there exist both
inter-processor-interrupts with corresponding message buffers and without
such buffers.
Add a routine that, if the corresponding DT compatible
string "xlnx,versal-ipi-mailbox" is used then a Versal-based SOC
can use a mailbox Device Tree entry where both host and remote
can use either of the buffered or bufferless interrupts.
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions